DocumentCode :
2126128
Title :
Queue Register File Optimization Algorithm for QueueCore Processor
Author :
Canedo, Arquimedes ; Abderazek, B. ; Sowa, Masahiro
Author_Institution :
Univ. of Electro-Commun., Tokyo
fYear :
2007
fDate :
24-27 Oct. 2007
Firstpage :
169
Lastpage :
176
Abstract :
The queue computation model offers an attractive alternative for high-performance embedded computing given its characteristics of short instructions and high instruction level parallelism. A queue-based processor uses a FIFO queue to read and write operands through hardware pointers located at the head and tail of the queue. Queue length is the number of elements stored between the head and the tail pointers during computations. We have found that 95% of the statements in integer applications require a queue length of less than 32 words. The remaining 5% requires larger queue length sizes up to 230 queue words. In this paper we propose a compiler technique to optimize the queue utilization for the hungry statements that require a large amount of queue. We show that for SPEC CINT95 benchmarks, our technique optimizes the queue length without decreasing parallelism. However, our optimization has a penalty of a slight increase in code size.
Keywords :
embedded systems; file organisation; query processing; FIFO queue; high-performance embedded computing; queue computation model; queue register file optimization algorithm; queue utilization; queue-based processor; queuecore processor; Computational modeling; Computer aided instruction; Computer architecture; Embedded computing; Hardware; High performance computing; Parallel processing; Program processors; Registers; Tail;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture and High Performance Computing, 2007. SBAC-PAD 2007. 19th International Symposium on
Conference_Location :
Rio Grande do Sul
ISSN :
1550-6533
Print_ISBN :
978-0-7695-3014-7
Type :
conf
DOI :
10.1109/SBAC-PAD.2007.10
Filename :
4384055
Link To Document :
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