• DocumentCode
    2126138
  • Title

    Arithmetic circuits for single-bit digital signal processing

  • Author

    Fujisaka, Hisato ; Masuda, Naoguki ; Sakamoto, Masahiro ; Morisue, Mititada

  • Author_Institution
    Hiroshima City University
  • Volume
    3
  • fYear
    1999
  • fDate
    5-8 Sept. 1999
  • Firstpage
    1389
  • Lastpage
    1392
  • Keywords
    Adders; Circuit noise; Counting circuits; Delta modulation; Digital arithmetic; Digital signal processing; Frequency; Low-frequency noise; Noise generators; Signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
  • Conference_Location
    Pafos, Cyprus
  • Print_ISBN
    0-7803-5682-9
  • Type

    conf

  • DOI
    10.1109/ICECS.1999.850722
  • Filename
    850722
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2126138