A hardware/software codesign of WZ factorization to improve time to solve matrices

Solving systems of linear and nonlinear equations is of fundamental importance at the basic level of a vast array of science and engineering applications. As these applications become more computationally complex, the need for low cost, high performance computing methods increases. This paper discusses different approaches to reduce computation time to solve linear equations by using a hardware/software (HW/SW) codesign employing direct methods to accurately and time-efficiently solve matrices. Emphasis is placed on a tested realization of a HW/SW codesign of WZ factorization on a Xilinx FPGA.