DocumentCode
2127128
Title
Evaluation of packaging options for very low noise amplifiers
Author
Navaratne, Donuwan ; Belostotski, Leonid
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
fYear
2010
fDate
2-5 May 2010
Firstpage
1
Lastpage
4
Abstract
In this work packaging options for very low noise amplifiers (VLNA) with a single on-chip output-choke inductor are investigated. For very low noise amplifiers package parasitics can add significant noise, degrading LNA performance. Flip-chip bonding is a newer approach to attaching integrated circuits onto printed circuit boards with reduced parasitics. In this work, it was found that choice of packaging depends on the available gain of the amplifier. As an example, for bond wires and flip-chip process used in this work for LNA available gains above ~10 dB, flip-chip bonding is preferred.
Keywords
flip-chip devices; inductors; integrated circuit bonding; integrated circuit noise; integrated circuit packaging; lead bonding; low noise amplifiers; printed circuits; VLNA; bond wires; flip-chip bonding; integrated circuits; noise; package parasitics; packaging options; printed circuit boards; single on-chip output-choke inductor; very low noise amplifiers; Bonding; Gain; Inductors; Integrated circuits; Noise; Transmission line measurements; Wires; Low noise amplifier; flip-chip bonding; packaging parasitics;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering (CCECE), 2010 23rd Canadian Conference on
Conference_Location
Calgary, AB
ISSN
0840-7789
Print_ISBN
978-1-4244-5376-4
Electronic_ISBN
0840-7789
Type
conf
DOI
10.1109/CCECE.2010.5575120
Filename
5575120
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