Title :
VLSI implementation of invisible digital watermarking algorithms towards the development of a secure JPEG encoder
Author :
Mohanty, Saraju P. ; Ranganathan, N. ; Namballa, Ravi K.
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
Abstract :
The research in digital watermarking is well matured. Several watermarking algorithms have been proposed for image, video, audio and text in the current literature. Digital watermarking is the process that embeds data, called a watermark, into a multimedia object such that the watermark can be detected or extracted later to make an assertion about the object. The number of software implementations of the proposed algorithms is significantly large, whereas a hardware implementations is lacking. Hardware implementation has advantages over software implementation in terms of low power, high performance, and reliability. We have developed a hardware system that can insert both robust and fragile invisible watermarks in the image. The hardware module can be easily incorporated in a JPEG encoder to develop a secure JPEG encoder. The watermark module is implemented using 0.35 μm CMOS technology. To our knowledge, this is the first watermarking chip implementing both invisible-robust and invisible-fragile watermarks.
Keywords :
CMOS digital integrated circuits; VLSI; data encapsulation; digital signal processing chips; image coding; integrated circuit design; watermarking; 0.35 micron; CMOS technology; VLSI implementation; fragile watermark; invisible digital watermarking algorithms; invisible watermark; multimedia object; robust watermark; secure JPEG encoder; watermarking chip; CMOS technology; Data mining; Hardware; Object detection; Power system reliability; Robustness; Software algorithms; Software performance; Very large scale integration; Watermarking;
Conference_Titel :
Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on
Print_ISBN :
0-7803-7795-8
DOI :
10.1109/SIPS.2003.1235666