Title :
Optimal fixed-point VLSI structure of a floating-point based digital filter design
Author :
Wu, An-Yeu ; Hwang, Kuo-Fuo
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
fDate :
31 May-3 Jun 1998
Abstract :
In this paper, we develop a knowledge-based CAD tool to assist the system IC designers with the fixed-point implementation of a prescribed digital filter. The tool will analyze the finite-precision behavior of three possible fixed-point implementations of a given floating-point based filter design. Based on the analytical results, the tool can suggest most suitable filter structure, wordlength assignment, and scaling operations to realize the filter. It will also estimate the hardware cost of the resulting VLSI architectures. Therefore, the designer can simply pick up the most cost-efficient VLSI implementation of the target filter without going through tedious fixed-point analysis
Keywords :
VLSI; circuit CAD; digital filters; digital integrated circuits; floating point arithmetic; integrated circuit design; knowledge engineering; IC design; VLSI architectures; cost-efficient VLSI implementation; digital filter design; finite-precision behavior; floating-point based digital filter; hardware cost; knowledge-based CAD tool; optimal fixed-point VLSI structure; scaling operations; wordlength assignment; Design automation; Digital filters; Digital integrated circuits; Finite impulse response filter; Hardware; IIR filters; Noise figure; Noise measurement; Roundoff errors; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.694501
