FPGA implementation of Kalman low-pass filter for applications in sigma-delta (Σ-Δ) demodulation

Over the last few decades, the use of sigma-delta (Σ-Δ) modulators has moved into mainstream applications in signal processing such as A/D, D/A, and communication. Σ-Δ modulators produce a single, or few, bit output, making them suitable for realization in VLSI circuits. For improved signal-to-quantization-noise ratio, higher order modulators, such as multi-loop and multi-stage architectures, are commonly used. The quantization noise behavior of these higher order modulators is well understood. Based on these quantization noise characteristics, various demodulator architectures, such as optimal FIR filter, sinc filter, and Laguerre filter are reported in the literature. An efficient FPGA (field programmable gate array) implementation of a Kalman recursive low-pass filter suitable for application in Σ-Δ demodulation is reported. FPGA synthesis results, as well as filter performance, as compared to previous designs for sinc filters and Laguerre filters, are given.