Title :
VLIW SIMD architecture based implementation of a multi-level dot diffusion algorithm
Author :
Ju, Seokhoon ; Sung, Wonyong
Author_Institution :
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
Abstract :
We have developed an efficient multi-level dot diffusion halftoning program for a digital copier using a TMS320C6416 DSP. Although this processor can execute several arithmetic operations in a cycle, the efficient use of the resources for the implementation of halftoning programs is difficult due to the sequential nature of the algorithm. The dot diffusion based algorithm is selected not only for better image quality, but also to exploit a higher degree of parallelism. The conventional dot diffusion computation procedure is modified in order to increase the regularity of arithmetic operations in the error diffusion process. Although this modification requires more arithmetic operations, the increase of the parallelism significantly shortens the overall processing time. As for multi-level quantization, a lookup table based method is employed in order to avoid conditional branch operations. This implementation can result in 30 PPM (page per minute) throughput for a 600 DPI A4 size digital copier.
Keywords :
digital arithmetic; digital signal processing chips; image processing; parallel processing; photocopying; quantisation (signal); table lookup; TMS320C6416 DSP; VLIW SIMD architecture; arithmetic operations; digital copier; error diffusion process; halftoning program; lookup table; multi-level dot diffusion algorithm; multi-level quantization; parallel processing; sequential algorithm; Arithmetic; Computer architecture; Digital signal processing; Image processing; Parallel processing; Quantization; Real time systems; Signal processing algorithms; Throughput; US Department of Transportation;
Conference_Titel :
Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on
Print_ISBN :
0-7803-7795-8
DOI :
10.1109/SIPS.2003.1235683