DocumentCode
2127701
Title
Asymmetrically-dope buried layer (ADB) structure CMOS for low-voltage mixed analog-digital applications
Author
Miyamoto, M. ; Toyota, K. ; Sekic, K. ; Nagano, T.
Author_Institution
Semicond. Dev. Center, Hitachi Ltd., Kokubunji, Japan
fYear
1996
fDate
11-13 June 1996
Firstpage
102
Lastpage
103
Abstract
A new CMOS structure is developed distinguished by an asymmetrically-doped buried layer (ADB), which achieves a high transconductance and a high drain output resistance down to 0.3-/spl mu/m technology necessary for high performance analog circuits at low-voltage power supply. The drain output resistance is increased by 50 times at 0.8-/spl mu/m technology and 5.5 times at 0.3-/spl mu/m technology. The transconductance is also increased by 1.8 times at 0.8-/spl mu/m technology and 1.3 times at 0.3-/spl mu/m technology.
Keywords
CMOS integrated circuits; buried layers; doping profiles; integrated circuit technology; ion implantation; mixed analogue-digital integrated circuits; 0.3 to 0.8 micron; CMOS structure; LV mixed analog-digital applications; asymmetrically-dope buried layer; high drain output resistance; high transconductance; low-voltage power supply; Analog circuits; CMOS analog integrated circuits; CMOS technology; Power supplies; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-3342-X
Type
conf
DOI
10.1109/VLSIT.1996.507809
Filename
507809
Link To Document