• DocumentCode
    2127845
  • Title

    A novel damascene process for one mask via/interconnect formation

  • Author

    Tue Nguyen ; Ulrich, B.D. ; Allen, L.R. ; Evans, D.R.

  • Author_Institution
    Sharp Microelectron. Technol., Camus, WA, USA
  • fYear
    1996
  • fDate
    11-13 June 1996
  • Firstpage
    118
  • Lastpage
    119
  • Abstract
    A novel damascene process was proposed using one mask to form both via and interconnect patterns. Submicron structures were fabricated successfully using conventional equipment. This novel damascene process can significantly simplify the backend fabrication process and allows self alignment between via and interconnect patterns.
  • Keywords
    VLSI; integrated circuit interconnections; integrated circuit manufacture; integrated circuit reliability; masks; photoresists; IC reliability; backend fabrication process; damascene process; interconnect pattern formation; mask; photoresists; self alignment; submicron structures; via formation; Fabrication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on
  • Conference_Location
    Honolulu, HI, USA
  • Print_ISBN
    0-7803-3342-X
  • Type

    conf

  • DOI
    10.1109/VLSIT.1996.507816
  • Filename
    507816
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2127845