0.15 /spl mu/m delta-doped CMOS with on-field source/drain contacts

A delta-doped CMOS with on-field source/drain contacts is developed. After BF/sub 2/ and As ion implantation for NMOS and PMOS regions, non-doped selective epitaxial channel layer is grown by UHV-CVD, and polysilicon S/D electrodes deposited on the field are connected with the epitaxial channel layer simultaneously. This structure can reduce the source/drain parasitic junction capacitance similar to that of SOI CMOS. The inverter speed of the delta-doped CMOS with on-field source/drain contacts are 30% faster than that of the conventional CMOS.