DocumentCode
2128541
Title
An architecture exploration framework for DSP applications
Author
Elhossini, Ahmed ; Areibi, Shawki ; Dony, Robert
Author_Institution
Sch. of Eng., Univ. of Guelph, Guelph, ON
fYear
2008
fDate
4-7 May 2008
Abstract
Advances in chip technology have enabled integrating many functional units on a single chip. This led to the emergence of the concept of system-on-chip (SoC) which is used extensively in the development of advanced embedded systems. Embedded systems are widely used today in different digital signal processing (DSP) applications that usually require high computation power and tight constraints. Using SoC technology increases the challenges facing the designer to choose the optimal design. A tool that helps explore different architectures is required to design an efficient system. In this paper we propose an implementation of an architecture exploration frame-work based on a multi-objective evolutionary algorithm (MOEA) for DSP applications. The design space is based on an experimental core library, and an analytical evaluation approach is used to speedup fitness calculation. Results obtained indicate that the proposed approach is valid and efficient for solving the architecture exploration problem.
Keywords
digital signal processing chips; embedded systems; evolutionary computation; system-on-chip; architecture exploration framework; digital signal processing application; embedded system development; multiobjective evolutionary algorithm; system design; system-on-chip; Application software; Computer architecture; Digital signal processing; Digital signal processing chips; Embedded system; Evolutionary computation; Hardware; Software libraries; Space technology; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2008. CCECE 2008. Canadian Conference on
Conference_Location
Niagara Falls, ON
ISSN
0840-7789
Print_ISBN
978-1-4244-1642-4
Electronic_ISBN
0840-7789
Type
conf
DOI
10.1109/CCECE.2008.4564513
Filename
4564513
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