A high programming throughput 0.35 /spl mu/m p-channel DINOR flash memory

Author

Sakamoto, O. ; Onoda, H. ; Katayama, T. ; Hayashi, K. ; Yamasaki, N. ; Sakakibara, K. ; Ohnakado, T. ; Takada, H. ; Tsuji, N. ; Ajika, N. ; Hatanaka, M. ; Miyoshi, H.

Author_Institution

ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan

fYear

1996

fDate

11-13 June 1996

Firstpage

222

Lastpage

223

Abstract

A high programming throughput p-channel DINOR flash memory with the BBHE injection programming method has been developed using 0.35 /spl mu/m CMOS process. This programming method realizes a high programming throughput of 8 nsec/Byte by utilizing 512 Byte parallel program operation with a low leakage current of less than 250 /spl mu/A. We have also demonstrated the good erase/write cycling endurance of 1/spl times/10/sup 5/. This process and device technology is very promising to the high performance 64 Mbit flash memories and future flash devices.

Keywords

CMOS memory circuits; EPROM; PLD programming; hot carriers; leakage currents; parallel programming; tunnelling; 0.35 micron; 250 muA; 64 Mbit; BBHE injection programming; CMOS process; divided bit-line NOR operations; erase/write cycling endurance; high density memory; high programming throughput; hot electron injection; low leakage current; p-channel DINOR flash memory; parallel program operation; CMOS process; Flash memory; Leakage current; Parallel programming; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-3342-X

Type

conf

DOI

10.1109/VLSIT.1996.507858

Filename

507858