Alternative architectures for pulse stuffing synchronizers

It is shown that the jitter produced by pulse stuffing synchronizers, used in digital transmission networks, can be decreased by using improved SNR Σ-Δ modulator circuits. For example, the technique of adaptive threshold modulation which is widely used in SONET/SDH synchronizers is shown to be such a circuit. The performance of these circuits can be further improved by the use of additional circuitry but maintaining their stability becomes a problem. This paper proposes stable alternative modulator architectures which are suitable for synchronizers. The performance of the proposed circuits is compared with the existing techniques