Title :
Asynchronous mapping of 2.048 Mbit/s tributary into SDH VC-12
Author :
Yongming, Xu ; Xiaopin, Zhang ; Peida, Ye
Author_Institution :
Beijing Univ. of Posts & Telecommun., China
Abstract :
SDH has been rapidly acknowledged as a world-wide transmission standard replacing the existing PDH infrastructure mainly because it offers plenty of overhead capacity and cross-connect capabilities required as a basis for efficient networking. The compatibility between SDH and PDH is one major feature of SDH. In public networks, 2.048 Mbit/s is basic transmission interface. Mapping the 2.048 Mbit/s tributary into STM-1 performs an important role in realizing the compatibility between SDH and PDH. There are three ways to mapping 2.048 Mbit/s tributary into VC-12: asynchronous mapping, bit synchronous mapping and byte synchronous mapping. Asynchronous mapping is needed at the interface between the PDH 2.048 Mbit/s and SDH equipment. An overview is given of asynchronous mapping of 2.048 Mbit/s tributary into SDH VC-12 and the theory of positive/zero/negative justification and the relative parameter is discussed. The major function blocks are also shown. The whole process of mapping can be implemented with CMOS technology
Keywords :
CMOS digital integrated circuits; synchronous digital hierarchy; telecommunication equipment; 2.048 Mbit/s; CMOS technology; SDH VC-12; SDH equipment; STM-1; asynchronous mapping; bit synchronous mapping; byte synchronous mapping; coder; overhead capacity; positive/zero/negative justification; public networks; transmission interface; transmission standard; Bit rate; CMOS process; CMOS technology; Clocks; Frequency; Jitter; Network interfaces; Packaging; Payloads; Power capacitors; Synchronous digital hierarchy; Voltage-controlled oscillators;
Conference_Titel :
Communication Technology Proceedings, 1996. ICCT'96., 1996 International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-2916-3
DOI :
10.1109/ICCT.1996.545006
