Analysis of memory interference in buffered multiprocessor systems in presence of hot spots and favorite memories

We present a discrete Markov chain model for analyzing the effect of memory interference in processor-memory interconnections of buffered multiprocessor systems. Each module is assumed to be one of the following three types-hot memory, favorite memory and memory which is neither hot nor favorite. The analytical solutions are restricted to 2×M and N×2 systems, where N and M are respectively the number of processors and memory modules. The general case is analyzed using simulation studies and compared with the analytic results. In all cases the main criterion of the system performance are the effective bandwidth, mean queue length and mean waiting time for a memory request. It is expected that increasing the number K of hot modules will improve the performance. We also estimate the asymptotic bandwidth and propose a heuristic to find an upper bound on K beyond which the bandwidth saturates