• DocumentCode
    2134655
  • Title

    Sizing of current conveyors by means of an Ant Colony Optimization technique

  • Author

    Benhala, Bachir ; Ahaitouf, Ali ; Mechaqrane, Abdellah ; Benlahbib, Brahim ; Abdi, Farid ; Abarkan, E.-H. ; Fakhfakh, Mourad

  • Author_Institution
    Lab. of Signals, Syst. & Component, Sidi Mohamed Ben Abdellah Univ., Fes, Morocco
  • fYear
    2011
  • fDate
    7-9 April 2011
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    An adaptation of the Ant Colony Optimization technique to the optimal sizing of analog circuits is presented. Details of the developed algorithm are given in the following. An application to the optimal sizing of CMOS inverted second generation current conveyors is presented, and comparison results with published works are highlighted. SPICE simulation results are given to show the viability of the proposed algorithm.
  • Keywords
    CMOS analogue integrated circuits; current conveyors; optimisation; CMOS inverted second generation current conveyor; SPICE simulation; analog circuit; ant colony optimization technique; Ant Colony Optimization; CMOS; ICCII+; Swarm Intelligence;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multimedia Computing and Systems (ICMCS), 2011 International Conference on
  • Conference_Location
    Ouarzazate
  • ISSN
    Pending
  • Print_ISBN
    978-1-61284-730-6
  • Type

    conf

  • DOI
    10.1109/ICMCS.2011.5945669
  • Filename
    5945669
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2134655