DocumentCode
2134995
Title
Petri net Splitting Operation within Embedded Systems Co-design
Author
Costa, Anikó ; Gomes, Luís
Author_Institution
Univ. Nova de Lisboa, Caparica
Volume
1
fYear
2007
fDate
23-27 June 2007
Firstpage
503
Lastpage
508
Abstract
As system complexity increases, the role of Model Based Development is more and more important. Several modeling formalisms are widely used when considering the area of hardware-software co-design of embedded systems. The goal of the work presented in this paper is to contribute for the usage of Petri nets as the system-level specification language. Techniques for system model partitioning into components are a major concern within co-design methodologies. This paper proposes a net operation, called net splitting, able to decompose a Petri net model into Petri net sub-models using synchronous communication channels. The operation is based on the definition of a valid cutting set. Specific rules are presented in order to obtain the sub-models from the initial one. The generated sub-models are associated with components to be executed concurrently, allowing a distributed execution of the initial model. On the other hand, at the implementation level, it is necessary to accommodate a severe deviation on synchronous communication channel execution semantics (as far as the components are in execution in different controllers and zero time delay is not possible to obtain). For some specific situations, initial model properties are not preserved considering execution of components obtained after net splitting operation. Although, it is possible to anticipate the impact of using specific communication channels models at the implementation level. For that end, a second step on property verification is needed in order to validate a specific partitioning solution. An illustrative example applying the referred mechanisms is presented.
Keywords
Petri nets; embedded systems; hardware-software codesign; logic partitioning; logic testing; specification languages; Petri net splitting operation; embedded system; hardware-software co-design; model based development; property verification; synchronous communication channel; system model partitioning; system-level specification language; Application software; Communication channels; Communication system control; Delay effects; Embedded software; Embedded system; Hardware; Petri nets; Specification languages; Unified modeling language; Petri net; co-design; distributed execution; embedded systems; system partitioning;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Informatics, 2007 5th IEEE International Conference on
Conference_Location
Vienna
ISSN
1935-4576
Print_ISBN
978-1-4244-0851-1
Electronic_ISBN
1935-4576
Type
conf
DOI
10.1109/INDIN.2007.4384808
Filename
4384808
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