Title :
A noise-robust echo canceller on V830 multimedia RISC processor integrated into a car navigation system
Author :
Hiratani, Yutaka ; Hirano, Akihim ; Kanazawa, Masaya
Author_Institution :
Dept. of Syst. Software, NEC IC Microcomput. Syst. Ltd., Kanagawa, Japan
Abstract :
This paper presents a noise-robust, fast-convergence echo canceller and its implementation on a multimedia RISC (reduced instruction set computer). Faster convergence is achieved by introducing an improved noise power estimator for step-size control. This echo canceller has been implemented on V830 multimedia embedded RISC and has been integrated into a car navigation system. The V830 provides a performance comparable to a digital signal processor (DSP) and extended flexibility while the power consumption is lower than that of a DSP. Computer simulations and measurements using a V830 board show fast convergence and robustness against disturbance such as a noise and double-talk without double-talk detection
Keywords :
adaptive signal processing; automobiles; echo suppression; microprocessor chips; multimedia communication; navigation; reduced instruction set computing; DSP; V830 board; V830 multimedia RISC processor; adaptive step-size; car navigation system; computer simulations; digital signal processor; double-talk; fast-convergence echo canceller; measurements; microprocessor; mobile telephones; noise power estimator; noise-robust echo canceller; power consumption; reduced instruction set computer; step-size control; stochastic gradient algorithm; Computer aided instruction; Convergence; Digital signal processing; Digital signal processors; Echo cancellers; Multimedia systems; Navigation; Noise cancellation; Noise robustness; Reduced instruction set computing;
Conference_Titel :
Acoustics, Speech and Signal Processing, 1998. Proceedings of the 1998 IEEE International Conference on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-4428-6
DOI :
10.1109/ICASSP.1998.681798
