DocumentCode :
2136184
Title :
Use of Behavioral Synthesis to Implement a Cellular Neural Network for Image Processing Applications
Author :
Amanatidis, Dimitrios ; Dossis, Michael
Author_Institution :
Dept. of Inf. & Comput. Technol., TEI of Western Macedonia, Kastoria, Greece
fYear :
2011
fDate :
Sept. 30 2011-Oct. 2 2011
Firstpage :
183
Lastpage :
187
Abstract :
In this contribution, behavioral synthesis tools are used for hardware implementation of a cellular neural network with the ability to accomplish image processing tasks in real time. Behavioral synthesis tools such as the CCC HLS framework can deliver correct-by-construction RTL VHDL implementations of computation-intensive applications such as image processing and cellular neural networks. The tool applies formal techniques to transform behavioral ADA specifications into RTL micro-architectures which then can be easily implemented by commercial RTL synthesizers. Example applications such as, edge-detection, half toning and morphological operations, validate the presented contribution.
Keywords :
cellular neural nets; coprocessors; edge detection; hardware description languages; high level synthesis; ADA specifications; CCC HLS framework; RTL VHDL implementations; RTL micro-architectures; behavioral synthesis tool; cellular neural network; custom coprocessor compilation; edge-detection; half toning; hardware implementation; high level synthesis; image processing applications; morphological operations; Cellular neural networks; Computers; Field programmable gate arrays; Hardware; Image edge detection; Processor scheduling; ASIC-FPGA design; behavioral synthesis; cellular neural networks; edge detection; halftoning; high-level synthesis; image morphology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Informatics (PCI), 2011 15th Panhellenic Conference on
Conference_Location :
Kastonia
Print_ISBN :
978-1-61284-962-1
Type :
conf
DOI :
10.1109/PCI.2011.11
Filename :
6065048
Link To Document :
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