Design of 5.8 GHz Dielectric Resonator Oscillator Applied in Electronic Toll Collection

Author

Sun, Bing ; Wu, Yiqiang ; Luo, Bin ; Du, Guoping

Author_Institution

Inst. of Inf. Eng., Nanchang Univ., Nanchang, China

fYear

2009

fDate

24-26 Sept. 2009

Firstpage

1

Lastpage

3

Abstract

In the electronic toll collection (ETC) application, the dielectric resonator oscillator (DRO) must exhibit low phase noise in order to meet bit error rate requirements. It also should provide enough output power to directly drive the mixer. This paper designs the DRO in the 5.8 GHz by negative resistance theory and harmonic balance theory with use of Agilent advance design system (ADS) tool. The dielectric resonator is modeled as a package of cResP in ADS. After the simulation and optimization of the nonlinear models of the DRO, the satisfying result was found. At @ 5.8 GHz, the output power was exhibited exceed 10 dBm, phase noise was less than -95 dBc.

Keywords

dielectric resonator oscillators; error statistics; microwave mixers; microwave oscillators; phase noise; Agilent advance design system tool; bit error rate requirement; dielectric resonator oscillator; electronic toll collection; frequency 5.8 GHz; harmonic balance theory; low phase noise; mixer; negative resistance theory; nonlinear models; Circuit simulation; Circuit stability; Dielectrics; Microwave oscillators; Packaging; Phase noise; Power generation; Power system modeling; Resonant frequency; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Communications, Networking and Mobile Computing, 2009. WiCom '09. 5th International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-3692-7

Electronic_ISBN

978-1-4244-3693-4

Type

conf

DOI

10.1109/WICOM.2009.5303409

Filename

5303409