DocumentCode :
2137373
Title :
Hardware Failure Virtualization Via Software Encoded Processing
Author :
Wappler, Ute ; Fetzer, Christof
Author_Institution :
Tech. Univ. Dresden, Dresden
Volume :
2
fYear :
2007
fDate :
23-27 June 2007
Firstpage :
977
Lastpage :
982
Abstract :
In future, the decreasing feature size will make it much more difficult to built reliable microprocessors. Economic pressure will most likely result in the reliability of microprocessors being tuned for the commodity market. Dedicated reliable hardware is very expensive and usually slower than commodity hardware. Thus, software implemented hardware fault tolerance (SIHFT) will become essential for building safe systems. Existing SIHFT approaches either are not broadly applicable or lack the ability to reliably deal with permanent hardware faults. In contrast, Forin (1989) introduced the vital coded microprocessor which reliably detects transient and permanent hardware failures, but is not applicable to arbitrary programs. It requires a dedicated development process and special hardware. We extend Forin´s Vital Code, so that it is applicable to arbitrary binary code which enables us to apply it to existing binaries or automatically during compile time. Furthermore, our approach does not require special purpose hardware.
Keywords :
electronic engineering computing; fault tolerant computing; microprocessor chips; hardware failure virtualization; microprocessor; software encoded processing; software implemented hardware fault tolerance; Aerospace electronics; Binary codes; Computer crashes; Fault tolerant systems; Frequency; Hardware; Lithography; Microprocessors; Resistance heating; Software safety;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Informatics, 2007 5th IEEE International Conference on
Conference_Location :
Vienna
ISSN :
1935-4576
Print_ISBN :
978-1-4244-0851-1
Electronic_ISBN :
1935-4576
Type :
conf
DOI :
10.1109/INDIN.2007.4384907
Filename :
4384907
Link To Document :
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