Survey of branch prediction schemes for pipelined processors

Branch prediction schemes have become an integral part of today´s pipelined processors. They are one of the key issues in enhancing the performance of pipelined processors. Pipeline stalls due to conditional branches are one of the most significant impediments to realizing the performance potential of deeply pipelined and superscalar processors. Many schemes for branch prediction, that can effectively and accurately predict the outcome of branch instructions have been proposed. In this paper, a survey of several branch prediction schemes for pipelined processors i.e., simple pipelined, deeply pipelined, and superscalar processors are presented. The pros and cons of each scheme are also discussed.