DocumentCode
2137736
Title
A procedure for designing a translator from C to VHDL
Author
Sanevelly, Vishnu V. ; Haggard, Roger L.
Author_Institution
Dept. of Electr. & Comput. Eng., Tennessee Technol. Univ., Cookeville, TN, USA
fYear
2002
fDate
2002
Firstpage
329
Lastpage
333
Abstract
Hardware/software codesign can be defined as the unification of separate hardware and software paths towards the development of a system as a whole. One of the prominent aspects of a codesign process is C to VHDL translation. This paper describes a procedure to design a translator from C to VHDL using transformation algorithms, which facilitate the process of C to VHDL translation. In particular, we examine the transformation algorithms involved in the process of C to VHDL translation.
Keywords
C language; grammars; hardware description languages; hardware-software codesign; program interpreters; C language; VHDL; hardware software codesign; lexical analysis; parsing; pass algorithm; program translation; transformation algorithms; Algorithm design and analysis; Costs; Field programmable gate arrays; Hardware design languages; High level languages; Partitioning algorithms; Process design; Software algorithms; Software design; Software tools;
fLanguage
English
Publisher
ieee
Conference_Titel
System Theory, 2002. Proceedings of the Thirty-Fourth Southeastern Symposium on
ISSN
0094-2898
Print_ISBN
0-7803-7339-1
Type
conf
DOI
10.1109/SSST.2002.1027061
Filename
1027061
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