A procedure for designing a translator from C to VHDL

Hardware/software codesign can be defined as the unification of separate hardware and software paths towards the development of a system as a whole. One of the prominent aspects of a codesign process is C to VHDL translation. This paper describes a procedure to design a translator from C to VHDL using transformation algorithms, which facilitate the process of C to VHDL translation. In particular, we examine the transformation algorithms involved in the process of C to VHDL translation.