Impact of Scaling on Thermal Behavior of Silicon-on-Insulator Transistors

In this manuscript, the impact of scaling on self-heating of silicon-on-insulator (SOI) transistors is investigated. For the first time the effect of temperature dependent phonon-boundary scattering in silicon thin films, which results in reduction in thermal conduction in the channel region, is incorporated to the hydrodynamic simulation of electrons and holes in a commercial electro-thermal simulation tool. Results of DC electro-thermal simulations are used to study drain current degradation due to self-heating and to obtain the thermal resistance of SOI devices as a function of the gate length and silicon layer thickness. The device thermal resistance is increased by more than a factor of 2 due to the scaling of gate length from 180nm to 45nm. Neglecting phonon-boundary scattering in the channel region may underestimate the degradation of drain current due to self-heating by nearly a factor of two. Thermal resistance of SOI devices with 25nm silicon layer can be up to 8 times larger than that of bulk devices