Development of a Si MOS MMIC Power Amplifier with Loss Minimized Design

Author

Matsuno, Noriaki ; Yano, Hitoshi ; Suzuki, Yasuyuki ; Watanabe, Toshiro ; Tanaka, Kunitsugu ; Honjo, Kazuhiko

Author_Institution

Optoelectronics and High Frequency Device Research Laboratories, NEC Corporation, 34 Miyukigaoka, Tsukuba, Ibaraki 305-8501, JAPAN. Phone: +81-298-50-1522, Fax: +81-298-50-1107, e-mail: matsuno@uhl.cl.nec.co.jp

Volume

1

fYear

1998

fDate

Oct. 1998

Firstpage

144

Lastpage

149

Abstract

An MMIC driver amplifier using a 0.6-Â¿m WSi gate Si MOSFET for 900-MHz-band GSM use has been developed. The input matching network which consists of a spiral inductor and a MOS capacitor was integrated onto the chip using a low-cost, mass-production LSI process. These passive elements were accurately modeled, taking into account the loss due to the Si substrate. We analyzed the loss dependence on both the gate structure of the MOSFET and the matching network topology, and optimized them by using large-signal simulations. The fabricated MMIC amplifier achieved a linear gain of 16.2 dB and an output power of 27.1 dBm with a power-added efficiency of 62% under a supply voltage of 4.8 V. These results agreed well with the simulated results and confirmed the accuracy of the design.

Keywords

Driver circuits; GSM; Impedance matching; Inductors; Large scale integration; MMICs; MOS capacitors; MOSFET circuits; Power amplifiers; Spirals;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 1998. 28th European

Conference_Location

Amsterdam, Netherlands

Type

conf

DOI

10.1109/EUMA.1998.338107

Filename

4139063