• DocumentCode
    2139266
  • Title

    Cluster architecture for reconfigurable signal processing engine for wireless communication

  • Author

    Saito, Miyoshi ; Fujisawa, Hisanori ; Ujiie, Nobuo ; Yoshizawa, Hideki

  • Author_Institution
    Adv. Mobile Phones Div., Fujitsu Ltd., Kawasaki, Japan
  • fYear
    2005
  • fDate
    24-26 Aug. 2005
  • Firstpage
    353
  • Lastpage
    359
  • Abstract
    We describe a dynamic reconfigurable baseband signal-processing engine suitable for mobile communications that require short operation latency. Signals are processed using a cluster group, which consists of clusters containing heterogenous processor elements (PEs), inter-PE networks, and a sequencer that controls dynamic reconfiguration. The cluster group also has dedicated shared signal processing resources. In the cluster, combined data transfer and operations are carried out within one cycle to minimize operation latency, except for the multicycled PE. We evaluated the architecture by mapping several physical-layer IEEE802.11a and 11b wireless LAN algorithms. The results confirmed a shorter processing latency.
  • Keywords
    IEEE standards; distributed processing; logic design; reconfigurable architectures; IEEE802.11a; IEEE802.11b; cluster architecture; inter-processor element networks; mobile communications; processor elements; reconfigurable signal processing engine; sequencer; wireless LAN algorithms; wireless communication; Baseband; Clustering algorithms; Communication system control; Delay; Engines; Mobile communication; Signal processing; Signal processing algorithms; Wireless LAN; Wireless communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2005. International Conference on
  • Print_ISBN
    0-7803-9362-7
  • Type

    conf

  • DOI
    10.1109/FPL.2005.1515747
  • Filename
    1515747