DocumentCode
2139326
Title
Realization of SAR real-time processor by FPGA
Author
Xiao, Xin ; Zhang, Rui ; Yang, Xiaobo ; Zhang, Gang
Author_Institution
Dept. of Electron. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu
Volume
6
fYear
2004
fDate
20-24 Sept. 2004
Firstpage
3942
Abstract
This paper designs and realizes a Synthetic Aperture Radar (SAR) real-time processor by FPGA chip EP1S25F672C6, analyses the performance advantages of using FPGA, and present the processing result of a frame of airborne SAR original data
Keywords
airborne radar; digital signal processing chips; field programmable gate arrays; geophysical signal processing; geophysical techniques; radar signal processing; remote sensing by radar; synthetic aperture radar; EP1S25F672C6; FPGA chip; PCI; SAR real-time processor; airborne SAR data; synthetic aperture radar; Adders; Azimuth; Data engineering; Design engineering; Digital signal processing; Digital signal processing chips; Field programmable gate arrays; Hardware; Synthetic aperture radar; Transmission line matrix methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Geoscience and Remote Sensing Symposium, 2004. IGARSS '04. Proceedings. 2004 IEEE International
Conference_Location
Anchorage, AK
Print_ISBN
0-7803-8742-2
Type
conf
DOI
10.1109/IGARSS.2004.1369989
Filename
1369989
Link To Document