A 16-bit carry skip adder designed by reversible logic

In digital integrated circuit designing, energy dissipation has become a crucial factor which engineers would consider before they begin the design. However, irreversible computing is one of the most significant factors of energy dissipation. Therefore, designing digital circuits by reversible logic way is an efficient way to decline the energy dissipation of the circuit. In this paper, we proposed a 16-bit carry skip adder which is an optimization of traditional ripple carry adder designed by reversible logic.