A variable-size shallow trench isolation (STL) technology with diffused sidewall doping for submicron CMOS

Author

Davari, B. ; Koburger, C. ; Furukawa, T. ; Taur, Y. ; Noble, W. ; Megdanis, A. ; Warnock, J. ; Mauer, J.

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

fYear

1988

fDate

11-14 Dec. 1988

Firstpage

92

Lastpage

95

Abstract

A shallow trench isolation (STI) technology, RIE (reactive ion etching), CVD (chemical vapor deposition) oxide fill, and polarization are used to realize lithography-limited, submicron device and isolation dimensions. A novel boron diffusion technique is used for nMOSFET field doping, so that the parasitic sidewall inversion (leakage) problem is eliminated. It is shown that both the channel width bias and the narrow channel effect are greatly reduced in the STI technology. The diffused field also allows the boron doping to be self-aligned to the n-well with a single masking step in CMOS. STI is used in conjunction with a MINT (merged isolation and node trench) cell in 16-Mb DRAM (dynamic random access memory) technology.<>

Keywords

CMOS integrated circuits; VLSI; boron; chemical vapour deposition; elemental semiconductors; integrated circuit technology; integrated memory circuits; lithography; random-access storage; semiconductor doping; semiconductor technology; silicon; sputter etching; 16 Mbit; CVD; DRAM; MINT; MINT cell; RIE; STI; STI technology; Si:B; ULSI; channel width bias; chemical vapor deposition; diffused sidewall doping; dynamic random access memory; lithography limited dimensions; merged isolation and node trench; n-well; nMOSFET field doping; narrow channel effect; oxide fill; parasitic sidewall inversion; polarization; reactive ion etching; scaling; self aligned doping; shallow trench isolation; single masking step; submicron CMOS; Boron; CMOS technology; Chemical technology; Chemical vapor deposition; Doping; Etching; Isolation technology; MOSFET circuits; Polarization; Random access memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Type

conf

DOI

10.1109/IEDM.1988.32759

Filename

32759