• DocumentCode
    2139798
  • Title

    Towards a reconfigurable tracking system

  • Author

    Wong, Sebastien Chee-Chew ; Jasiunas, M. ; Kearney, Damien

  • Author_Institution
    Div. of Electron. Warfare & Radar, Defence Sci. & Technol. Organ., Edinburgh, SA, Australia
  • fYear
    2005
  • fDate
    24-26 Aug. 2005
  • Firstpage
    456
  • Lastpage
    462
  • Abstract
    Robust real-time automatic detection tracking and classification of objects in imagery is one of the most computationally demanding tasks in computer vision. Historically the field of computer vision has been limited by computing power. In particular algorithms that require multiple correlations, convolutions and other complex operations can be prohibitive to implement on a microprocessor. Part of the poor performance of microprocessors is their serial nature, while many of these operations are inherently parallel. One approach to implementing these operations in parallel is to build them in hardware using application specific integrated circuits (ASIC). Another approach is to use Field Programmable Gate Arrays (FPGAs) and reconfigurable computing. Reconfigurable computing offers a trade-off between the speed of hardware and flexibility of software. This paper describes two computationally intensive tracking algorithms, investigates their implementation on a reconfigurable computer, and benchmarks their performance. From our preliminary results we find that reconfigurable computing is well suited to the implementation of real-time tracking systems.
  • Keywords
    application specific integrated circuits; computer vision; field programmable gate arrays; microprocessor chips; real-time systems; reconfigurable architectures; tracking; application specific integrated circuits; computer vision; field programmable gate arrays; imagery; microprocessor; object classification; real-time automatic detection tracking; real-time tracking system; reconfigurable computing; reconfigurable tracking system; Australia; Computer vision; Field programmable gate arrays; Hardware; Image recognition; Lakes; Layout; Microprocessors; Object detection; Radar tracking;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2005. International Conference on
  • Conference_Location
    Tampere
  • Print_ISBN
    0-7803-9362-7
  • Type

    conf

  • DOI
    10.1109/FPL.2005.1515764
  • Filename
    1515764