Title :
Bi-thread microcontroller as digital signal processor
Author :
Stefan, Denisa ; Stefan, Gheorghe
Author_Institution :
Dept. of Electron., Polytech. Univ. of Bucharest, Romania
Abstract :
A bi-thread pipeline RISC microcontroller working together with a simple but efficient arithmetic coprocessor is proposed as digital signal processor. The structure has a Dual Architecture in which the main thread is used to manage the interfacing process and to run the algorithm and the slave thread is used only to control the “hard” computation in the arithmetic coprocessor that performs the sum of products. For coprocessor we have a sequential machine with a good mean working time. The paper presents the machine architecture and the associated organisation
Keywords :
coprocessors; digital signal processing chips; microcontrollers; pipeline processing; reduced instruction set computing; sequential machines; arithmetic coprocessor; bi-thread pipeline RISC microcontroller; digital signal processor; dual architecture; hard computation; interfacing process; machine architecture; multi-thread approach; sequential machine; slave thread; sum of products; Computer architecture; Computer interfaces; Coprocessors; Digital arithmetic; Digital signal processors; Microcontrollers; Pipelines; Reduced instruction set computing; Signal processing algorithms; Yarn;
Conference_Titel :
Semiconductor Conference, 1997. CAS '97 Proceedings., 1997 International
Conference_Location :
Sinaia
Print_ISBN :
0-7803-3804-9
DOI :
10.1109/SMICND.1997.651329
