DocumentCode
2139858
Title
Power delivery design for 800MHz DDR2 memory systems in low-cost wire-bond packages
Author
Schmitt, Ralf ; Kim, Joong-Ho ; Oh, Dan ; Yuan, Chuck
Author_Institution
Rambus Inc., Los Altos, CA
fYear
0
fDate
0-0 0
Abstract
This paper describes the challenges in designing supply networks of high-speed interface systems in low-cost wire-bond packages. It introduces a set of figure-of-merits for the supply noise performance of interface systems. It then demonstrates how these parameters can be used to guide the design and verification of interface power distribution networks
Keywords
DRAM chips; integrated circuit packaging; lead bonding; power supply circuits; 800 MHz; DDR2 memory; figure-of-merits; high-speed interface systems; interface power distribution; power delivery; supply noise performance; wire-bond packages; Bandwidth; Circuit noise; Design methodology; Impedance; Noise figure; Packaging; Power distribution; Power systems; Rails; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2006. Proceedings. 56th
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
1-4244-0152-6
Type
conf
DOI
10.1109/ECTC.2006.1645651
Filename
1645651
Link To Document