Title :
The design of an asynchronous MIPS R3000 microprocessor
Author :
Martin, Alain J. ; Lines, Andrew ; Manohar, Rajit ; Nyström, Mika ; Penzes, Paul ; Southworth, Robert ; Cummings, Uri ; Lee, Tak Kwan
Author_Institution :
Dept. of Comput. Sci., California Inst. of Technol., Pasadena, CA, USA
Abstract :
The design of an asynchronous clone of a MIPS R3000 microprocessor is presented. In 0.6 μm CMOS, we expect performance close to 280 MIPS, for a power consumption of 7 W. The paper describes the structure of a high-performance asynchronous pipeline, in particular precise exceptions, pipelined caches, arithmetic, and registers, and the circuit techniques developed to achieve high throughput
Keywords :
CMOS digital integrated circuits; VLSI; asynchronous circuits; computer architecture; microprocessor chips; pipeline processing; 0.6 micron; 280 MIPS; 7 W; CMOS design; MIPS R3000; arithmetic; asynchronous microprocessor; circuit techniques; high throughput; high-performance asynchronous pipeline; pipelined caches; precise exceptions; registers; Asynchronous circuits; CMOS technology; Computer science; Delay; Energy consumption; Low voltage; Microprocessors; Pipelines; Robustness; Throughput;
Conference_Titel :
Advanced Research in VLSI, 1997. Proceedings., Seventeenth Conference on
Conference_Location :
Ann Arbor, MI
Print_ISBN :
0-8186-7913-1
DOI :
10.1109/ARVLSI.1997.634853
