Efficient embedded FPL resource usage for RNS-based polyphase DWT filter banks

Author

Garcia, A. ; Castillo, E. ; Lloris, A. ; Ramirez, J. ; Meyer-Baese, U.

Author_Institution

Dept. Electron. & Comput. Technol., Granada Univ., Spain

fYear

2005

fDate

24-26 Aug. 2005

Firstpage

531

Lastpage

534

Abstract

The discrete wavelet transform is routinely used in numerous applications and its efficient implementation in VLSI technology is a subject of continuous research. This paper shows the implementation of reduced complexity and high performance polyphase wavelet filter banks using Galois field arithmetic. The proposed designs are compared to traditional systems using 2´s complement (2C) arithmetic with the proposed architectures being about 65% faster than 2C designs and requiring less logic in most study cases.

Keywords

Galois fields; VLSI; channel bank filters; digital filters; discrete wavelet transforms; logic design; programmable logic devices; residue number systems; Galois field arithmetic; RNS-based polyphase DWT filter banks; VLSI technology; discrete wavelet transform; embedded FPL resource usage; field programmable logic devices; polyphase wavelet filter banks; residue number system; Application software; Arithmetic; Channel bank filters; Continuous wavelet transforms; Digital signal processing; Discrete wavelet transforms; Educational institutions; Galois fields; System-on-a-chip; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Field Programmable Logic and Applications, 2005. International Conference on

Print_ISBN

0-7803-9362-7

Type

conf

DOI

10.1109/FPL.2005.1515778

Filename

1515778