DocumentCode
2140168
Title
A unified sub- mu m MOSFET CAD model
Author
Masuda, H. ; Mano, J. ; Ikematsu, R. ; Yamashiro, O. ; Tanaka, H. ; Aoki, M.
Author_Institution
Hitachi Ltd., Tokyo, Japan
fYear
1988
fDate
11-14 Dec. 1988
Firstpage
118
Lastpage
121
Abstract
A unified model made up of I-V, C-V, and I/sub sub/-V analytical models with tens of model parameters is proposed. The model parameters are given by formulas that each include a geometry (channel-length) effect. Experimental results show an accuracy of 1% for the I-V model and 10% for the C-V model. A 1.0- mu m CMOS inverter has been simulated and the results verified by experiments. Good agreement has been obtained.<>
Keywords
CAD; electronic engineering computing; insulated gate field effect transistors; semiconductor device models; C-V characteristics; CAD model; CMOS inverter; I-V characteristics; channel length effect; submicron MOSFET; unified model; Capacitance; Capacitance-voltage characteristics; Degradation; Equations; Hot carriers; MOSFET circuits; Semiconductor device modeling; Solid modeling; Stress; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Type
conf
DOI
10.1109/IEDM.1988.32767
Filename
32767
Link To Document