Hot-carrier degradation of CMOS-inverters

Dynamic degradation effects in CMOS (complementary metal oxide semiconductor) inverters are investigated by monitoring the frequency shift of ring oscillators. Gate delay times down to 0.18 ns are used. A stress-time dependence of the degradation was found that disagrees with duty-cycle calculations in the degradation range of 1 to 10%. Static and dynamic stress experiments (down to 3-ns transients) with single-transistor characterization confirmed the above result and showed that the time dependence of the static degradation is weaker than that of the dynamic degradation. These results are consistent with a degradation model in which a field-enhancing detrapping of holes in trapping states close to the interface causes degradation-enhancing modulations of the electric field.<>