DocumentCode
2141185
Title
A low-energy FPGA: architecture design and software-supported design flow
Author
Siozios, Konstantinos ; Soudris, Dimitrios ; Thanailakis, Antonios
Author_Institution
Dep. of Electr. & Comput. Eng., Democritus Univ. of Thrace, Xanthi, Greece
fYear
2005
fDate
24-26 Aug. 2005
Firstpage
707
Lastpage
708
Abstract
The aim of the PhD thesis is the development of systematic methodologies both for hardware and software level for designing low-energy and performance efficient reconfigurable systems. This problem is tackled at two different design tasks, namely the design of efficient CLB architecture and the supporting CAD tools for mapping a VHDL-designed application onto the designed FPGA device.
Keywords
field programmable gate arrays; hardware description languages; hardware-software codesign; logic design; low-power electronics; reconfigurable architectures; CAD tools; VHDL; architecture design flow; hardware-software codesign; low energy FPGA; reconfigurable system; software supported design flow; Design automation; Design engineering; Energy consumption; Field programmable gate arrays; Graphical user interfaces; Hardware design languages; Minimization; Software design; Software performance; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications, 2005. International Conference on
Print_ISBN
0-7803-9362-7
Type
conf
DOI
10.1109/FPL.2005.1515818
Filename
1515818
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