Prediction of channel thermal noise in twin silicon nanowire MOSFET (TSNWFET)

Author

Lee, Jaehong ; Jeon, Jongwook ; Kim, Junsoo ; Park, Byung-Gook ; Lee, Jong Duk ; Shin, Hyungcheol

Author_Institution

Nano Syst. Inst., Inter-Univ. Semicond. Res. Center (ISRC), Seoul, South Korea

fYear

2008

fDate

20-23 Oct. 2008

Firstpage

61

Lastpage

63

Abstract

In this work, channel thermal noise in the twin silicon nanowire MOSFET (TSNWFET) is predicted using analytic thermal noise model taking into account short channel effects. TSNWFET used in this work has 40 nm gate length, 5 nm radius of silicon wire, and the 3.5 nm of gate oxide. Predicted thermal noise is compared with that of the planar MOSFET using various processes.

Keywords

MOSFET; elemental semiconductors; nanowires; semiconductor device models; semiconductor device noise; silicon; thermal noise; MOSFET; Si; analytic thermal noise model; channel thermal noise; short channel effects; size 3.5 nm; size 40 nm; size 5 nm; twin silicon nanowire; Equations; MOSFET circuits; Nanoscale devices; Power MOSFET; Predictive models; Semiconductor device noise; Silicon; Thermal engineering; Thermal resistance; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-2185-5

Electronic_ISBN

978-1-4244-2186-2

Type

conf

DOI

10.1109/ICSICT.2008.4734463

Filename

4734463