Spatiotemporal Modular Arrangement for Energy Efficient Reconfigurable SoCs

In this paper, the proposed approach is assessed from not only its power-performance efficiency but also the accuracy of implemented algorithms on the real hardware environment. The real system treats pattern recognition and motion tracking. The former uses the subspace method and the latter adapts the Kanade-Lucas-Tomasi (KLT) algorithm. These algorithms are widely known in computer vision but the both approaches are unsuited for reconfigurable architectures because they include much complex calculation such as the extraction of a square root of 32-bit or 64-bit data width. But, these methods do not operate simultaneously. Thus, by adopting spatiotemporal reconfiguration pipeline, this paper also describes not only the reduction of configuration size but also the achievement of low power consumption with the same performance of the naive approach.