DocumentCode
2141535
Title
Reliability investigations of leadless QFN packages until end-of-life with application-specific board-level stress tests
Author
Birzer, Christian ; Stoeckl, Stephan ; Schuetz, Gerhard ; Fink, Markus
Author_Institution
Infineon Technol. AG, Regensburg
fYear
0
fDate
0-0 0
Abstract
We report board level stress tests of leadless QFN packages (pitch 0.5 mm) with focus on different application fields. We did temperature cycling tests, drop test, bend test, and power cycling tests, with special focus on the influences of board design and soldering technology. We performed the stress tests until end-of-life and determined the dominating failure modes. In our temperature cycling study on 2.35 mm thick boards solder joints of SnAgCu performed slightly worse than SnPbAg. We were able to optimize the thermal pad design on the PCB to improve the temperature cycling reliability. For drop test we achieved an excellent reliability by comparing different board designs. This was achieved by avoiding copper trace cracking within the board. This failure mode we verified also with cyclic bend tests. Additionally we performed power cycling investigations using different power consumptions and solder pastes for board assembly (SnAgCu and SnPbAg). A strong lifetime dependence on power and a superior behavior of SnAgCu solder was found. The results were successfully correlated with finite element simulations. In our stress tests we observed clear evidence for influence of soldering technology and board design/technology on board level reliability performance. For different application fields satisfactory reliability can be achieved in case specific measures on board assembly and printed circuit board design are taken
Keywords
copper alloys; finite element analysis; lead alloys; printed circuit design; printed circuit testing; reliability; silver alloys; soldering; solders; thermal management (packaging); tin alloys; 0.5 mm; 2.35 mm; SnAgCu; SnPbAg; application-specific board-level stress tests; board level reliability; board level stress tests; cyclic bend tests; drop test; failure mode; finite element simulations; leadless QFN packages; power cycling investigations; power cycling tests; printed circuit board; solder joints; solder pastes; temperature cycling reliability; temperature cycling tests; thermal pad design; Assembly; Copper; Design optimization; Lead; Packaging; Performance evaluation; Soldering; Temperature; Testing; Thermal stresses;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2006. Proceedings. 56th
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
1-4244-0152-6
Type
conf
DOI
10.1109/ECTC.2006.1645710
Filename
1645710
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