Title :
Novel MOSFET structures for RF applications
Author :
Jhaveri, Ritesh ; Girish, N.V. ; Woo, Jason
Author_Institution :
Dept. of Electr. Eng., Univ. of California Los Angeles, Los Angeles, CA, USA
Abstract :
Rising demand for computing, mobile and telecommunication applications has fueled increasing efforts to integrate analog and digital functions on a single chip to create System-on-Chip (SOC) type applications. To improve RF performance of devices alternate structures must be explored to overcome problems such as degrading ROUT and gain, parasitics, noise and linearity. Towards this end, novel asymmetric Tunneling Source SOI-MOSFETs are proposed in this paper. The main feature of these devices is the concept of gate controlled carrier injection through tunneling at the source junction. The tunneling source MOSFETs can be fabricated using conventional CMOS processes. Compared to conventional SOI MOSFETs, these novel devices show excellent short channel immunity which improves scalability into sub-50 nm regime and make them an attractive candidate for analog operations.
Keywords :
CMOS analogue integrated circuits; silicon-on-insulator; system-on-chip; tunnelling; CMOS processes; MOSFET structures; RF applications; asymmetric tunneling source SOI-MOSFET; digital function; gate controlled carrier injection; integrated analog function; source junction tunneling; system-on-chip type applications; telecommunication applications; Analog computers; Degradation; Linearity; MOSFET circuits; Mobile computing; Performance gain; Radio frequency; System-on-a-chip; Telecommunication computing; Tunneling;
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
DOI :
10.1109/ICSICT.2008.4734475