DocumentCode :
2142008
Title :
Towards ultimate CMOS performance with new stressor materials
Author :
Yeo, Yee-Chia
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore (NUS), Singapore, Singapore
fYear :
2008
fDate :
20-23 Oct. 2008
Firstpage :
121
Lastpage :
125
Abstract :
In this paper, new technology options for boosting the performance of CMOS transistors pioneered by our group will be discussed. We focus on several new strain engineering techniques that were recently demonstrated for enhancing electron and hole mobilities in n-FET and p-FET, respectively. New applications of materials such as diamond-like carbon high-stress liner, silicon-carbon (Si:C or Si1-yCy) source/drain, and silicon-germanium-tin (SiGeSn) source/drain, and other novel heterostructures will be reviewed. Integration of new stressors in advanced device architectures is expected to enable the realization of ultimate CMOS performance.
Keywords :
CMOS integrated circuits; diamond-like carbon; electron mobility; field effect transistors; germanium compounds; hole mobility; silicon compounds; wide band gap semiconductors; CMOS transistors; SiC; SiGeSn; boosting; diamond-like carbon; electron mobility; high-stress liner; hole mobility; n-FET; p-FET; silicon-carbon; strain engineering; stressor materials; ultimate CMOS performance; CMOS technology; Capacitive sensors; Charge carrier processes; Diamond-like carbon; Electron mobility; Energy consumption; Leakage current; Power engineering and energy; Silicon; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
Type :
conf
DOI :
10.1109/ICSICT.2008.4734488
Filename :
4734488
Link To Document :
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