CMOS low-power analog circuit design

This chapter covers device and circuit aspects of low-power analog CMOS circuit design. The fundamental limits constraining the design of low-power circuits are first recalled with an emphasis on the implications of supply voltage reduction. Biasing MOS transistors at very low current provides new features but requires dedicated models valid in all regions of operation including weak, moderate and strong inversion. Low-current biasing also has a strong influence on noise and matching properties. All these issues are discussed, together with the particular aspects related to passive devices and parasitic effects. The design process has to be supported by efficient and accurate circuit simulation. To this end, the EKV compact MOST model for circuit simulation is presented. The use of the basic concepts such as pinch-off voltage, inversion factor and specific current are highlighted thanks to some very simple but fundamental circuits and to an effective use of the model. New design techniques that are appropriate for low-power and/or low-voltage circuits are presented with an emphasis on the analog floating point technique, the instantaneous companding principle, and their application to filters