Title :
A dual-level adaptive supply voltage system for variation resilience
Author :
Shim, Kyu-Nam ; Hu, Jiang ; Silva-Martinez, Jose
Author_Institution :
Dept. of ECE, Texas A&M Univ., TX, USA
Abstract :
VLSI circuits of 45 nm technology and beyond are increasingly affected by process variations as well as aging effects. Overcoming the variations inevitably requires additional power expense which in turn aggravates the power and heat problem. Adaptive supply voltage (ASV) is an arguably power-efficient approach for variation resilience since it attempts to allocate power resources only to where the negative effect of variations is strong. We propose a dual-level ASV system for designs containing many timing critical paths. This system can simultaneously provide adaptive supply voltage at both coarse-grained and fine-grained level, and has limited power routing overhead. The dual-ASV system is compared with conventional ASV through SPICE simulations on benchmark circuits. The results indicate that the dual-ASV system consumes significantly less power and achieves similar performance in presence of variations.
Keywords :
SPICE; VLSI; power electronics; SPICE simulations; VLSI circuits; adaptive supply voltage system; benchmark circuits; power-efficient approach; process variations; variation resilience; Adaptive systems; Aging; Circuits; Resilience; Resource management; Routing; SPICE; Timing; Very large scale integration; Voltage;
Conference_Titel :
Quality Electronic Design (ISQED), 2010 11th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-6454-8
DOI :
10.1109/ISQED.2010.5450408