• DocumentCode
    2143378
  • Title

    Fast block-iterative domain decomposition algorithm for IR drop analysis in large power grid

  • Author

    Zhong, Yu ; Wong, Martin D F

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ of Illinois at Urbana-Champaign, Urbana, IL, USA
  • fYear
    2010
  • fDate
    22-24 March 2010
  • Firstpage
    277
  • Lastpage
    283
  • Abstract
    Due to the extremely large sizes of power grids, IR drop analysis has become a computationally challenging problem both in terms of runtime and memory usage. In order to design scalable algorithms to handle ever increasing power-grid sizes, the most promising approach is to use a ¿divide-and-conquer¿ strategy such as domain decomposition. Such an approach not only decomposes a large problem into manageable sub-problems, it also naturally allow a parallel processing solution for further speedup in computation time. As a result, a power-grid analysis algorithm based upon the traditional domain decomposition method has been reported. Unfortunately, the method in has strong limitation on the size of the interfaces between the sub-problems and therefore severely limits its capability in solving very large problems. In this paper, we present a block-iterative domain-decomposition algorithm which effectively combines the advantages of direct solvers and iterative methods. With a carefully chosen domain decomposition strategy, our approach does not suffer from the difficulties. While the algorithm fails to analyze a power grid of 4 millions nodes, our algorithm solves a power grid of 42 millions nodes accurately in 1.5 hours.
  • Keywords
    divide and conquer methods; integrated circuit design; integrated circuit reliability; iterative methods; IR drop analysis; block-iterative domain decomposition algorithm; direct solver; divide-and-conquer strategy; parallel processing; power-grid analysis algorithm; Algorithm design and analysis; Concurrent computing; Failure analysis; Grid computing; Iterative algorithms; Iterative methods; Optical computing; Parallel processing; Power grids; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ISQED), 2010 11th International Symposium on
  • Conference_Location
    San Jose, CA
  • ISSN
    1948-3287
  • Print_ISBN
    978-1-4244-6454-8
  • Type

    conf

  • DOI
    10.1109/ISQED.2010.5450430
  • Filename
    5450430