Characterization of Flip Chip Bump Interconnects

This paper presents lumped elements equivalent circuits for several interconnects between microstrip and CPW transmission lines printed on GaAs and silicon substrates using flip chip technology. The effect of the bump height on the transition insertion and return losses and on the element values of the equivalent circuit is presented. It is shown that the performance of flip chip transitions is limited by the parasitic capacitance between the bump interconnects and the bump pads. By proper choice of the bump height, the area of the bump interconnects and the bump pads, it is possible to obtain bandwidth of the order of 150GHz.