Title :
Comparative analysis and study of metastability on high-performance flip-flops
Author :
Li, David ; Chuang, Pierce ; Sachdev, Manoj
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada
Abstract :
In this paper, we analyze and characterize the metastability of 11 previously proposed high-performance flip-flops, reduced clock-swing flip-flops, and level-converting flip-flops. From extensive simulation results in 65nm CMOS technology, the main metastability parameters of ¿ and T0 are extracted and analyzed at both nominal and reduced supply voltage. Our simulation results indicate that these flip-flops exhibit a wide range (up to few orders of magnitudes) of metastability windows. In particular, flip-flops with differential and positive feedback configuration such as the sense-amplifier based flip-flops demonstrate the most optimal metastability. Based on this finding, a novel pre-discharge flip-flop (PDFF) with positive feedback configuration is proposed. Extensive simulation results reveal that PDFF achieves better metastability than the previous proposed flip-flops at both nominal voltage supply and nominal voltage supply with reduced clock-swing.
Keywords :
CMOS integrated circuits; circuit feedback; flip-flops; clock-swing flip-flops; differential feedback; high-performance flip-flops; level-converting flip-flops; metastability; nominal voltage supply; positive feedback configuration; predischarge flip-flop; reduced supply voltage; sense-amplifier based flip-flops; Analytical models; CMOS technology; Clocks; Delay; Dynamic voltage scaling; Feedback; Flip-flops; Frequency; Metastasis; Synchronization;
Conference_Titel :
Quality Electronic Design (ISQED), 2010 11th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-6454-8
DOI :
10.1109/ISQED.2010.5450482