• DocumentCode
    2144834
  • Title

    A revisit to the primal-dual based clock skew scheduling algorithm

  • Author

    Ni, Min ; Memik, Seda Ogrenci

  • Author_Institution
    Synopsys Inc., Mountain View, CA, USA
  • fYear
    2010
  • fDate
    22-24 March 2010
  • Firstpage
    755
  • Lastpage
    764
  • Abstract
    Clock skew scheduling is a useful sequential circuit optimization method. The run time efficiency of this problem becomes crucial if it must be repeated iteratively in a higher level optimization. The widely recognized Burns´ algorithm proposed to solve this problem suffers from high runtime complexity, which makes it unsuitable to be deployed in iterative optimization loops. This algorithm is based on the general concept of primal-dual optimization. In this paper, we demonstrate that a more efficient approach to the clock skew scheduling problem can be developed by designing a new algorithm using the same primal-dual optimization concept. The basic idea of the algorithm is to avoid creating new admissible graph and recalculating ¿ values for each iteration of the primal-dual optimization. The asymptotic runtime efficiency of our algorithm is of O(|V||E| + |V|2log|V|), which is improved from O(|V|2|E|) thanks to the heap data structure used in our proposed algorithm. The experimental results show that our algorithm is on average 95 times faster than Burns´ implementation. In best case, we can observe as much as 189 times speedup.
  • Keywords
    circuit optimisation; iterative methods; sequential circuits; Burns algorithm; asymptotic runtime efficiency; circuit optimization method; heap data structure; high runtime complexity; iterative optimization loops; primal-dual based clock skew scheduling algorithm; primal-dual optimization concept; sequential circuit; Algorithm design and analysis; Clocks; Data structures; Design optimization; Iterative algorithms; Optimization methods; Registers; Runtime; Scheduling algorithm; Sequential circuits; Clock Skew Scheduling; Optimization; Primal-Dual; Sequential Circuit;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ISQED), 2010 11th International Symposium on
  • Conference_Location
    San Jose, CA
  • ISSN
    1948-3287
  • Print_ISBN
    978-1-4244-6454-8
  • Type

    conf

  • DOI
    10.1109/ISQED.2010.5450492
  • Filename
    5450492