DocumentCode :
2144921
Title :
Alternative B-Sequences
Author :
Duan, Lihua ; Chen, Jessica
Author_Institution :
Univ. of Windsor, Windsor
fYear :
2007
fDate :
11-12 Oct. 2007
Firstpage :
127
Lastpage :
136
Abstract :
When an implementation under test (IUT) is state-based, and its expected abstract behavior is given in terms of a finite state machine (FSM), a checking sequence generated from the specification FSM and applied on the lUTfor testing can provide us with high-level confidence in the correct functional behavior of our implementation. One of the issues here is to generate efficient checking sequences in terms of their lengths. In this paper, we discuss the possibility of reducing the lengths of checking sequences by making use of the invertible transitions in the specification FSM to increase the choice of betasequences to be included into a checking sequence. We present a sufficient condition for adopting alternative beta-sequences and illustrate a possible way of incorporating these alternative beta-sequences into existing methods for checking sequence generation to further reduce their lengths.
Keywords :
finite state machines; formal specification; program testing; checking sequence generation; finite state machine; implementation under test; Automata; Automatic testing; Circuit testing; Computer science; Context modeling; Fault detection; Protocols; Sequential circuits; Sufficient conditions; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Software, 2007. QSIC '07. Seventh International Conference on
Conference_Location :
Portland, OR
ISSN :
1550-6002
Print_ISBN :
978-0-7695-3035-2
Type :
conf
DOI :
10.1109/QSIC.2007.4385488
Filename :
4385488
Link To Document :
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